FIB/TEM 3D metrology

Raynetics works on the metrology gap created by 3D devices. Logic has moved from FinFET to gate all around and stacked transistors. Memory has gone vertical. Packaging now stacks whole dies with hybrid bonds and deep vias.

In all of these the critical dimensions and the killer defects sit buried inside the stack, where surface inspection cannot see them. Today the only way to get that view is cross section analysis in a FIB or TEM. It is accurate but slow, and it depends on a handful of experts, so a single 3D answer can take days.That is a yield problem, not a lab problem. During ramp, one yield point on a high volume fab is worth tens of millions of dollars a month, and characterisation delay eats roughly a third of time to market across 20 to 40 learning cycles.

Our expertise is closing that gap. We solve the inverse problem behind 3D reconstruction, alignment & artifact issues automatically, so buried structure and composition can be measured quickly and repeatably rather than reconstructed by hand.