Cryogenic Microelectronics for Quantum Computing and Scientific Detectors

The team has experience designing analog integrated circuits and test structures in various process nodes down to 28 nm CMOS. Having gained experience in device characterization and experiment-based tuning of MOSFET models for circuit simulations, we are interested in expanding our expertise in cryogenic ICs, an area that is currently rapidly gaining importance. We have created cryogenic CMOS device models, which enable IC design down to 4K. We are currently working on their improvement and on IC validation. These activities have begun with the DRD7 Collaboration on future particle detectors, and we are now also seeking to contribute to the field of cryogenic instrumentation for quantum computing and for other research fields.