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ProductUpdated on 13 November 2025

Riviera-PRO

Field Application Engineer at Aldec

Poland

About

High-Performance Simulator for Advanced Verification of Mixed Language Designs

IEEE VHDL, SystemVerilog, Verilog-AMS, SystemC/C/C++

Verification Libraries: UVM, OS-VVM

Assertion-Based Verification: SVA, PSL

Looking for

  • License partner

Applies to

  • IT solutions and software

Organisation

Aldec

Company - Industry

Henderson, United States

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