RISC-V GPU Design

Graphics Processing Units (GPUs) have evolved into versatile hardware for general-purpose parallel computing (GPGPU) with advancements like CUDA and OpenGL APIs. The growing demand for GPUs, fueled by applications like AR, VR, AI and gaming, is projected to reach almost 207 billion dollars by 2029. Research at TUBITAK BILGEM’s Integrated Circuit Design and Training Laboratory led to Mercek, a GPGPU that implements the I-M-A-F-V extensions of RISC-V ISA and POCL for compiling OpenCL kernels to RISC-V binaries, aiming to achieve multi-core multi-thread structure. The initial design is implemented with a single core, single texture unit, 8 thread with 2 level cache on Nexys A7-100T. Functional performance was verified at 50 MHz, and 3D models with textures were rendered successfully. For ASIC implementation Mercek is synthesized with TSMC 16nm technology at 1.5 GHz using Synopsys Fusion Compiler Tool. In the next phases of the project, we aim to create a SoC that includes both our in-house GPU-based AI accelerator as well as high-performance CPU cores.